Compaq AlphaServer ES40 Informacje Techniczne Pobierz pdf (Strona 408)

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D-50 Compaq AlphaServer ES40 Service Guide

Table D–21 Bit Definition of Logout Frame Registers (Continued)

Identification Bit Field Text Translation Description

EXC_ADDR <0>

<63:2>

Set = exception or interrupt occurred in PAL mode

Contains the PC address of the instruction that would have

executed if the error interrupt did not occur.

IER_CM <4:3>

<13>

<28:14>

<30:29>

<31>

<32>

<38:33>

00(Bin) = Kernel Mode, 01(Bin) = Executive Mode,

10(Bin) = Supervisor Mode, 11(Bin) = User Mode

Set = enables those AST interrupt requests by ASTER

Software interrupt enables

Performance counter interrupt enables

Set = Correctable read error interrupt enabled

Set = Serial Line Interrupt Enabled

External IRQ<5:0> enable

I_SUM <4:3>

<10:9>

<28:14>

<32>

<31>

<30:29>

<38:33>

AST Kernel and Executive Interrupts pending ;

<3> Set = Kernel Mode AST interrupt pending,

<4> Set =Executive Mode AST interrupt pending

AST Supervisor and User Interrupts pending ;

<9> Set =Supervisor Mode AST interrupt pending,

<10> Set =User Mode AST interrupt pending

Software interrupts pending

Serial line interrupt pending

Set = Corrected read interrupt pending

Performance counter interrupts pending

External interrupts pending

PAL_BASE <43:15> Contains the physical base address for PALcode

1 2 ... 403 404 405 406 407 408 409 410 411 412 413 ... 443 444

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